Dodatne informacije

• Lični podaci

• Datum rođenja: 01.01.1981.
• Mesto rođenja: Leskovac

• Obrazovanje

• Fakultet: Elektronski fakultet
• Odsek / Grupa / Smer: Elektronika
• Godina diplomiranja: 2006.

• Spisak publikacija

• Monografije i poglavlja u monografijama:

  B. Jovanovic, R. M. Brum, L. Torres (2015). Logic circuits design based on MRAM, from single to multi-states cells storage. In W. Zhao, G. Prenat (Eds.), Spintronic-based Computing, (pp. 179-200). Switzerland: Springer International Publishing, doi: http://dx.doi.org/10.1007/978-3-319-15180-9_6, (M14)

  
  

  R. M. Brum, B. Jovanovic, L. Torres (2015). Spintronic-Memory-Based Reconfigurable Computing. In P. E. Gaillardon (Ed), Reconfigurable Logic: Architecture, Tools, and Applications, (pp. 433-458), CRC Press, doi: http://dx.doi.org/10.1201/b19388-21, (M14)

  
  

   

• Knjige i udžbenici:

  M. Jevtic, B. Jovanovic, "Digitalna elektronika – Praktikum za laboratorijske vežbe," Elektronski fakultet, Nis, Srbija, 2008, ISBN 978-86-85195-68-6

• Radovi u časopisima sa IMPACT faktorom:

  G. Stančić, M. Đurić, B. Jovanović, S. Cvetković, “A complexity analysis of IIR filters with an approximately linear phase“, Radioengineering Journal, vol. 28, no. 2, pp. 430-438, Mar. 2019. doi: 10.13164/re.2019.0430 (IF = 1.048 (2017), M22)

  
  

  B. Jovanovic, R. M. Brum, L. Torres, " Evaluation of hybrid MRAM/CMOS cells for “normally-off and instant-on” computing," Analog Integrated Circuits and Signal Processing, vol. 87, no. 3, pp. 607-621, Dec. 2014, doi: http://dx.doi.org/10.1007/s10470-014-0427-5 (IF=0.401 (2013), M23)

  
  

  B. Jovanovic, R. M. Brum, L. Torres, " Comparative Analysis of MTJ/CMOS Hybrid Cells based on TAS and In-plane STT Magnetic Tunnel Junctions," IEEE Transactions on Magnetics, vol. 51, no. 2, p. 3400111, Aug. 2014, doi: http://dx.doi.org/10.1109/TMAG.2014.2347009 (IF=1.422 (2012), M22), Cover Figure.

  
  

  B. Jovanovic, R. M. Brum, L. Torres, "A hybrid magnetic/complementary metal oxide semiconductor three-context memory bit cell for non-volatile circuit design," Journal of Applied Physics, vol. 115, no. 13, p. 134316, Apr. 2014, doi: http://dx.doi.org/10.1063/1.4870599 (IF=2.21 (2012), M21)

  
  

  B. Jovanovic, R. Jevtic and C. Carreras, “Binary Division Power Models for High-Level Power Estimation of FPGA-Based DSP Circuits,” IEEE Transactions on Industrial Informatics, vol. 10, no1. pp. 393-398, Feb. 2014. ISSN: 1551-3203 doi:10.1109/TII.2013.2261080 (IF=8.785 (2013), M21)

  
  

  B. Jovanovic, R. Jevtic and C. Carreras, “Triple-bit method for power estimation of nonlinear digital circuits in FPGAs,” Electronics Letters, vol. 46, no. 13, pp. 903-905, Jun. 2010. ISSN 0013-5194 doi:10.1049/el.2010.0790 (IF=1.140 (2008), M22)

• Radovi u ostalim časopisima:

  B. Jovanovic, R. M. Brum, L. Torres “MTJ-based hybrid storage cells for "normally-off and instant on" computing,” Sci. J. Facta Universitatis, ser:Elec.Energ., vol. 28, no. 3, pp. 465-476, Sep. 2015. ISSN 0353-3670 Link (M24)

  
  

  B. Jovanovic, M. Jevtic, “Methods for Power Minimization in Modern VLSI Circuits,” Int. J. Reasoning-based Intelligent Systems, vol. 4, nos. 1/2, pp. 46-57, Apr. 2012. ISSN (Print): 1755-0556 doi:10.1504/IJRIS.2012.046491 (M52)

  
  

  B. Jovanovic, M. Jevtic “FPGA implementation of a hybrid on-line process monitoring in PC based Real-Time systems,” Serbian J. of Electrical Engineering, vol. 8, no. 1, pp. 37-51, Jun. 2011. ISSN 1451 – 4869 Link (M52)

  
  

  N. Stamenkovic, B. Jovanovic, “Reverse Conversion Design for the 4-Moduli Set {2n-
  1,2n,2n+1, 22n+1-1},” Sci. J. Facta Universitatis, ser:Elec.Energ., vol. 24, no. 1, pp. 89-103, Apr. 2011. ISSN 0353-3670 Link (M24)

  
  

   

• Radovi na naučnim skupovima međunarodnog značaja:

  C. Flouzat, E. Piriou, M. Guibert, B. Jovanovic, M. Oussayran, “An Automotive Video Acquisition and Processing Platform,” In Proceedings of DATE 20 Conference, Grenoble, France, 9-13 March 2020, session 12.6.3, Link (M33)

  
  

  D. Levac, B. Jovanovic, "Is children’s motor learning of a postural reaching task enhanced by practice in a virtual environment?", In Proc. of International Conference on Virtual Rehabilitation, Montreal, Canada, 19-22 June 2017 doi: 10.1109/ICVR.2017.8007489 (M33, best paper award)

  
  

  G. Stančić, B. Jovanović, M. Petrović, "Complexity analysis of the quadratic phase IIR digital filters", In Proc. of IcEtran, Kladovo, Serbia, 2016, Link (M33)

  
  

  B. Jovanovic, R. Jevtic, C. Carreras, “TBT Signal Model for Improved Accuracy of High-level Dynamic Power Estimation Procedure,” In. Proc. of Small Systems Simulation Symposium, Niš, Serbia, 2012, pp. 62-66, ISBN 978-86-6125-059-0 Link (M33)

  
  

  B. Jovanovic, M. Jevtic, “Optimization of the Binary Adder Architectures Implemented in ASICs and FPGAs,” In Proc. of 5th Int. Workshop on Soft Computing Applications, Szeged, Hungary, 2012, pp. 295-308, ISBN 978-3-642-33941-7 doi:10.1007/978-3-642-33941-7_27 (M33)

  
  

  R. Jevtic, B. Jovanovic, C. Carreras, “Power estimation of dividers implemented in FPGAs,” In Proc. of 21st Great Lakes Symposium on VLSI, Lausanne, Switzerland, 2011, pp. 313-318, ISBN 978-1-4503-0667-6 doi:10.1145/1973009.1973072 (M33)

  
  

  B. Jovanovic, M. Jevtic, “Total Power Consumption in Modern VLSI Circuits,” In. Proc. ICEST 2011 Conf., Niš, Serbia, 2011, vol. 2, pp. 293-296 Link (M33, best paper award)

  
  

  B. Jovanovic, M. Jevtic, S. Djosic, "Using Altera DE1 development board for educational purposes, Int. Sci. Conf. UNITECH’11, Gabrovo, Bulgaria, 2011, vol. 1, pp. 258-262, ISSN 1313-230X (M33)

  
  

  B. Jovanovic, M. Jevtic, “One implementation of a Hybrid On-line process monitoring in PC based Real-Time Systems,” In Proc. Embedded Real-Time Software and Systems (ERTS2) Conf., Toulouse, France, 2010, pp. 7D-3 1-8 Link (M33)

  
  

  B. Jovanovic, M. Jevtic, "FPGA implementation of throughput increasing techniques of the binary dividers," Int. Sci. Conf. UNITECH’10, Gabrovo, Bulgaria, 2010, vol. 1, pp. 397-401, ISSN 1313-230X Link (M33)

  
  

  N. Stamenkovic, B. Jovanovic, V. Stojanovic, "Reverse Conversion for Residue Number System Realization of Digital Signal Processing Hardware," In Proc. 18th Telecommunications forum TELFOR 2010, Belgrade, Serbia, 2010, pp. 638-641, ISSN 978-86-7466-392-9 Link (M33)

  
  

  B. Jovanovic, M. Jevtic, "An approach to Digital Low-Pass IIR Filter Design," In. Proc. of Small Systems Simulation Symposium, Niš, Serbia, 2010, pp. 61-66, ISBN 987-86-6125-006-4 Link (M33)

  
  

  B. Jovanovic, M. Jevtic, "Modul for run-time monitoring in PC hardware based Real-Time System," Int. Sci. Conf. UNITECH’09, Gabrovo, Bulgaria, 2009, vol. 1, pp. 657-660, ISSN 1313-230X Link (M33)

  
  

   

• Radovi na domaćim naučnim skupovima:

  B. Jovanovic, M. Jevtic, "Arhitektura binarnog sabirača pogodna za implementaciju na FPGA," Zbornik radova 56. Konferencije ETRAN, Zlatibor, Srbija, 2012, EL.1.6 pp. 1-4, ISBN 978-86-80509-67-9 Link (M63)

  
  

  B. Jovanovic, M. Jevtic, "Static and Dynamic Power Consumption of Arithmetic Circuits in Modern Technologies," Zbornik radova 55. Konferencije ETRAN, Banja Vrucica, BiH, 2011, EL.3.6 pp. 1-4, ISBN 978-86-80509-66-2 Link (M63)

  
  

  B. Jovanovic, M. Jevtic, "FPGA implementacija hibridnog on-line nadzora procesa za PC-bazirane real-time sisteme," Zbornik radova 54. Konferencije ETRAN, Donji Milanovac, Srbija, 2010, EL.4.4 pp. 1-4, ISBN 978-86-80509-65-5 Link (M63, best paper award)

  
  

  N. Stamenkovic, B. Jovanovic, "An Improved Residue to Binary Converter Based on Mixed-Radix Conversion for the Moduli Set {22n+1-1,22n,2n-1}," 8. Konferencija o Digitalnoj obradi govora i slike, DOGS, Iriški Venac, Srbija, 2010, ISSN 978-86-7892-311-1 Link (M63)

  
  

  M. Jevtic, B. Jovanovic, D. Milovanovic, "Jedna realizacija bežične mreže za upravljačko-nadzorne sisteme," Zbornik radova 53. Konferencije ETRAN, Vrnjacka Banja, Srbija, 2009, EL.1.3 pp. 1-4, ISBN 978-86-80509-64-8 Link (M63)

  
  

  B. Jovanovic, M. Jevtic, "Realizacija laboratorijskih vežbi iz Digitalne elektronike korišćenjem FPGA čipa," Zbornik radova 15. Konferencije o računarskim naukama i informacionim tehnologijama YUINFO, Kopaonik, Srbija, 2009, ISSN 978-86-85525-04-0 Link (M63)

  
  

  M. Jevtic, B. Jovanovic, S. Djosic, M. Cvetkovic, "Jedna realizacija detektora kvara u upravljačkim sistemima robota," Zbornik radova 8. Naučno-stručnog simpozijuma o informacionim tehnologijama INFOTEH, Jahorina, BiH, 2009, pp. 814-818, ISSN: 99938-624-2-8 Link (M63)

  
  

  M. Jevtic, S. Djosic, B. Jovanovic, "Programabilni sistem za energetski efikasno upravljanje sistemom individualnog grejanja u domaćinstvima," Zbornik radova 52. Konferencije ETRAN, Palic, Srbija, 2008, EL.4.1 pp. 1-4, ISBN 978-86-80509-63-1 Link (M63)

  
  

  B. Jovanovic, M. Blagojevic, "Upravljanje elektromagnetom za kalibraciju magnetnih senzora pomoću softverskog paketa LabVIEW," Zbornik radova 15. Konferencije o računarskim naukama i informacionim tehnologijama YUINFO, Kopaonik, Srbija, 2008, ISSN 978-86-85525-03-2 Link (M63)

• Tehnička rešenja:

  B. Jovanovic, M. Jevtic, "Bezicni upravljacko-nadzorni sistem mobilnih robota" (Laboratorijski prototip, M85) Link