Dodatne informacije

• Lični podaci

• Datum rođenja: 26.8.1955.
• Mesto rođenja: Niš

• Obrazovanje

• Fakultet: Elektronski fakultet u Nišu
• Odsek / Grupa / Smer: Mikroelektronika i Mikrosistemi
• Godina diplomiranja: 1980.

• Spisak publikacija

• Radovi u časopisima sa IMPACT faktorom:
  
  
  
  
  
  

  B. Pešić, S. Dimitrijev, N. Stojadinović, "Sudden Failures Associated with the Gate Oxide of CMOS Transistors", Microelectronics and Reliability, vol. 28, pp. 643-648 (1988). B. Pešić, S. Dimitrijev, N. Stojadinović, "Investigation of Gate Oxide Breakdown in CMOS Integrated Circuits", Microelectronics Journal, vol. 20 pp. 19-26 (1989). T. Brozek, B. Pešić, A. Jakubowski, N. Stojadinović, " Breakdown Properties of Thin Oxide in Irradiated MOS Capacitors",  Microelectronics and Reliability, vol. 33, pp. 649-657 (1993). T. Brozek, B. Pešić, " The Impact of High-Field Stressing on C-V Characteristics of Irradiated Gate Oxides", Applied Surface Science, vol. 63, pp. 295-300 (1993). T. Brozek, B. Pešić, A. Jakubowski, "Wear-out Properties of Irradiated Oxides in MOS Structures", Microelectronics Journal, vol. 24, pp. 381-387 (1993). T. Brozek, B. Pešić, A. Jakubowski, N. Stojadinović, "Statistical Modelling of Multimodal Gate Oxide Breakdown Data Based on Mixed Weibull Distributions Concept", Proc. 4th European Symposium on Reliability of Electron Devices, Failure Physics and Analysis (ESREF'93), Bordeaux, October 1993 (pp. 171-176). B. Pešić, N. Tošić, Z. Prijić, Z. Pavlović, N. Stojadinović, "Reliability of Power VDMOS Transistors, Proc. 6th European Symposium on Reliability of Electron Devices, Failure Physics and Analysis (ESREF'95), Bordeaux, October 1995 (pp. 111-116). N. Tošić, B. Pešić, N. Stojadinović, "Investigation of Failure Mechanisms in Power VDMOSFETs", Proc. 6th International Symposium on the Physical & Failure Analysis of Integrated Circuits - IPFA 97, Singapore, July 1997 (pp. 191-195). N. Tošić, B. Pešić, N. Stojadinović, "High Temperature Reverse Bias Testing of Power VDMOS Transistors, Proc. 8th European Symposium on Reliability of Electron Devices, Failure Physics and Analysis (ESREF'97), Bordeaux, October 1997 (pp. 1759-1762). N. Tošić, B. Pešić, N. Stojadinović, "High Temperature Reverse Bias Testing of Power VDMOS Transistors, Proc. 8th European Symposium on Reliability of Electron Devices, Failure Physics and Analysis (ESREF'97), Bordeaux, October 1997 (pp. 1759-1762). A. Prijić, B. Pešić, Z. Prijić, D. Pantić, Z. Pavlović, “3D Simulation of Electrical and Thermal Characteristics of Electric Contacts“, Electronics, Vol. 6, No. 2, pp. 3-5 (2002). B. Pešić, Lj. Vračar, N. Stojadinović, M. Pecovska-Djordjević, N. Novkovski, “Stress-Induced Leakage Currents in Thin Silicon Dioxide Films”, J. of Materials Sci.: Materials in Electronics, vol. 14, pp. 805-807 (2003). B. Pešić, Lj. Vračar, N. Stojadinović, M. Pecovska-Djordjević, N. Novkovski, “Stress-Induced Leakage Currents in Thin Silicon Dioxide Films”, J. of Materials Sci.: Materials in Electronics, vol. 14, pp. 805-807 (2003). E. Jovanović, D. Pantić, B. Pešić, D. Pantić, “3D Simulation of Vertical Hall Device”, Proc. 7th International Symposium on Microelectronics Technologies and Microsystems, Sofia-Sozopol, September 2003 (pp. 138-143). A. Prijić, B. Pešić, Z. Prijić, D. Pantić, Z. Pavlović, “3-D Simulation of Riveted Electric Contacts – Temperature and Yield Stress Distributions”, Proc. 7th International Symposium on Microelectronics Technologies and Microsystems, Sofia-Sozopol, September 2003 (pp. 57-62). A. Prijić, B. Pešić, Z. Prijić, D. Pantić, Z. Pavlović, “Temperature and Yield Stress Characterization of Electric Contacts by 3D Numerical Simulation”, Serbian J. Electrical Eng., vol. 2, No 1, pp. 77-91 (2005). Lj. Vračar, B. Pešić, N. Stojadinović, “Computer as Powerful Tool in Reliability Testing of Thin Gate Dielectrics in MOS Devices”, Proc. International Conference on “Computer as Tool” - EUROCON 2005, Belgrade, November 2005 (pp. 1159-1162). Aneta Prijić, Zoran Prijić, Biljana Pešić, Dragan Pantić, Stojan Ristić, Dragan Mančić, Zoran Petrušić, “Design and Optimization of S-Type Thermal Cutoffs”, IEEE Transaction on Components and Packaging Technologies, vol. 31, no. 4, pp. 904-912, December 2008 Sanja Aleksić, Biljana Pešić, Dragan Pantić, “Simulation of semiconductor bulk trap influence on the electrical characteristics of the n-channel power VDMOS transistor”, Informacije MIDEM Journal of Microelectronics, Electronics Components and Materials, vol. 43, no. 2, pp. 124-130, 2013.

• Radovi u ostalim časopisima:
  
  
  
  
  
  
• Radovi na naučnim skupovima međunarodnog značaja:
  
  
  
  
  
  
  
  
  
  
  
  
  
  
  
  
  
  
  
  
  
  

  E. Jovanović, D. Pantić, B. Pešić, D. Pantić, “3D Simulation of Vertical Hall Device”, Proc. 7th International Symposium on Microelectronics Technologies and Microsystems, Sofia-Sozopol, September 2003 (pp. 138-143).

  A. Prijić, B. Pešić, Z. Prijić, D. Pantić, Z. Pavlović, “3-D Simulation of Riveted Electric Contacts – Temperature and Yield Stress Distributions”, Proc. 7th International Symposium on Microelectronics Technologies and Microsystems, Sofia-Sozopol, September 2003 (pp. 57-62).

  A. Prijić, B. Pešić, Z. Prijić, D. Pantić, Z. Pavlović, “Temperature and Yield Stress Characterization of Electric Contacts by 3D Numerical Simulation”, Serbian J. Electrical Eng., vol. 2, No 1, pp. 77-91 (2005).

  Lj. Vračar, B. Pešić, N. Stojadinović, “Computer as Powerful Tool in Reliability Testing of Thin Gate Dielectrics in MOS Devices”, Proc. International Conference on “Computer as Tool” - EUROCON 2005, Belgrade, November 2005 (pp. 1159-1162).

  A. Prijić, Z. Prijić, B. Pešić, “A New Method of Evaluation of Liquidus Temperatures of Ternary Alloys”, Proc. 25th International Conference on Microelectronics (MIEL'06), Belgrade, May 2006 (pp.359-399).

  A. Prijić, Z. Prijić, B. Pešić, D. Pantić, S. Ristić, “Analysis of Electrical and Thermal Characteristics of Thermal Cutoffs”, Proc. XLII International Scientific Conference on Information, Communication and Energy Systems and Technologies (ICEST 2007), Ohrid, June 2007 (pp. 827-830).

• Radovi na domaćim naučnim skupovima:

  Aneta Prijić, Biljana Pešić, Zoran Prijić, Dragan Pantić, Zoran Pavlović, “3D simulacija električnih i termičkih karakteristika električnih kontakata”, Zbornik radova IV simpozijum INDEL 2002, pp. 25-27, Banja Luka, 2002

  
  

  Elva Jovanović, Danijela Pantić, Tatjana Pešić, Dragan Pantić, “Karakteristike VDMOS tranzistora sa super spojem”, Zbornik radova IV simpozijum INDEL 2002, pp. 22-24, Banja Luka, 2002.

  
  

  Aneta Prijić, Biljana Pešić, Zoran Prijić, Dragan Pantić, Zoran Pavlović, “3D simulacija mehaničkih, električnih i termičkih karakteristika električnih kontakata”, Zbornik radova XLVII Konf. za ЕTRAN,  Herceg Novi, 2003

  
  

  Elva Jovanović, Tatjana Pešić, Danijela Pantić, Biljana Pešić,  Dragan Pantić, ”2D i 3D simulacija poluprovodničkih mikrokomponenata korišćenjem TCAD softverskih paketa”, YUINFO 2004,  Kopaonik, 2004.

  
  

  Elva Jovanović, Biljana Pešić, Dragan Pantić, ”3D simulacija tehnološkog niza za proizvodnju i električnih karakteristika krstastog Holovog senzora ”, Zbornik radova XLVIII Konf. za ЕTRAN,  Čačak, 2004.

  
  

  Elva Jovanović, Danijela Pantić, Biljana Pešić, Dragan Pantić, “3D simulacija split-drejn MOSFET-a ”, Zbornik radova XLIX Konf. za ЕTRAN,  Budva, 2005

  
  

  Aneta Prijić, Biljana Pešić, Zoran Prijić, Dragan Pantić, Stojan Ristić, “Analiza karakteristika termičkih prekidača 3D numeričkom simulacijom ”, Zbornik radova VIII simpozijum INDEL 2006,  Banja Luka, 2006.

  
  

  S. Aleksić, D. Pantić, B. Pešić, “Analiza uticaja površinskih stanja na karakteristike VDMOS tranzistora snage kotišćenjem TCAD softverskog paketa”, Zbornik radova 56. konferencije ETRAN, Zlatibor, 11 – 14. juna 2012

  
  

  Sanja Aleksić, Biljana Pešić, Dragan Pantić , “TCAD analiza HEFS degradacije električnih karakteristika n-kanalnog VDMOSFET-a”, Zbornik radova 57. konferencije ETRAN, Zlatibor, 3 – 6. juna 2013.